Lecture: Architecture Room: E3 Future Peta and Exascale Architectures – Hybrid-Multi-core Architecture of XT6 and XE6 Socket 34 architecture Gemini Interconnect

Lecture: Running on Cray Room: E3 Using CNL Compiler options and flags Aprun options I/O configuration Using Craypat to profile applications

Lecture: Optimization I Room: E3 Three levels of optimization – a glimpse of the future (MPI, OpenMP and Vectorization)

Hands-on: Profiling Room: SAM Hands-on workshop on profiling applications. Attendees are encouraged to bring their own application to work with.

Lecture: Optimization II Room: StudioC Memory understanding and optimization Vectorization Using Craypat for obtaining Memory statistics

Lecture: Optimization III Room: StudioC Shared Memory Optimization, Using OpenMP efficiently OpenMP extensions for Hybrid multi-core architectures Using Craypat for examining OpenMP performance

Lecture: Optimization IV Room: StudioC Optimization of I/O

Hands-on: Optimization Room: SAM Hands-on workshop on optimization of applications

Lecture: Optimization V Room: StudioC Scaling applications to thousands of processors MPI optimization Task placement

Lecture: Global address space Room: StudioC Co-array Fortran and UPC on XE6 Advantages and Disadvantages of MPI and PGAS

Lecture: Optimization Review Room: StudioC Differences between XT6 and XE6 Developing applications today for future architectures

Hands-on: Optimization Room: SAM Hands-on workshop in optimization of applications.