Cray Programming Environment Workshop

18 Oct 2010, 09:00 → 20 Oct 2010, 17:00 Europe/Stockholm

PDC, KTH

Erwin Laure (PDC - Center for High-Performance Computing)

PDC and Cray are happy to welcome you to a Cray Programming Environment (PE) Workshop at PDC on October 18-20, 2010. The 3 day workshop is located on site at PDC, and is structured in theoretical and hands-on sessions. Users are encouraged to bring their own codes that may be analyzed during the hands-on session. The number of seats for this workshop is limited to twenty so please do not hesitate to register quickly!

Monday 18 October

09:00 → 10:30 Lecture: Architecture

Future Peta and Exascale Architectures – Hybrid-Multi-core Architecture of XT6 and XE6 Socket 34 architecture Gemini Interconnect

10:30 → 10:45 Coffea and Tea

10:45 → 12:00 Lecture: Running on Cray

Using CNL Compiler options and flags Aprun options I/O configuration Using Craypat to profile applications

12:00 → 13:00 Lunch

13:00 → 14:30 Lecture: Optimization I

Three levels of optimization – a glimpse of the future (MPI, OpenMP and Vectorization)

14:30 → 14:45 Coffea and Tea

14:45 → 17:00 Hands-on: Profiling

Hands-on workshop on profiling applications. Attendees are encouraged to bring their own application to work with.

Tuesday 19 October

09:00 → 10:30 Lecture: Optimization II

Memory understanding and optimization Vectorization Using Craypat for obtaining Memory statistics

10:30 → 10:45 Coffea and Tea

10:45 → 12:00 Lecture: Optimization III

Shared Memory Optimization, Using OpenMP efficiently OpenMP extensions for Hybrid multi-core architectures Using Craypat for examining OpenMP performance

12:00 → 13:00 Lunch

13:00 → 14:30 Lecture: Optimization IV

Optimization of I/O

14:30 → 14:45 Coffea and Tea

14:45 → 17:00 Hands-on: Optimization

Hands-on workshop on optimization of applications

Wednesday 20 October

09:00 → 10:30 Lecture: Optimization V

Scaling applications to thousands of processors MPI optimization Task placement

10:30 → 10:45 Coffea and Tea

10:45 → 12:00 Lecture: Global address space

Co-array Fortran and UPC on XE6 Advantages and Disadvantages of MPI and PGAS

12:00 → 13:00 Lunch

13:00 → 14:30 Lecture: Optimization Review

Differences between XT6 and XE6 Developing applications today for future architectures

14:30 → 14:45 Coffea and Tea

14:45 → 17:00 Hands-on: Optimization

Hands-on workshop in optimization of applications.