Name: Introduction to High Performance Computing
Start: 2018-08-13T08:00:00+02:00
End: 2018-08-24T15:00:00+02:00
Location: KTH main campus

Introduction to High Performance Computing

from Monday 13 August 2018 (08:00) to Friday 24 August 2018 (15:00)

Monday 13 August 2018

08:00 Registration (Registration desk in front of Q2)
Registration (Registration desk in front of Q2)
08:00 - 09:00
Room: Q2
09:00 Welcome to PDC and the Summer School - Erwin Laure (PDC-HPC)
Welcome to PDC and the Summer School
- Erwin Laure (PDC-HPC)
09:00 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 High-Performance Computer Architecture - Dimitrios Nikolopoulos
High-Performance Computer Architecture
- Dimitrios Nikolopoulos
10:15 - 12:00
Room: Q2
12:00 Picnic - KTH garden
Picnic - KTH garden
12:00 - 14:00
14:00 High-Performance Computer Architecture - Dimitrios Nikolopoulos
High-Performance Computer Architecture
- Dimitrios Nikolopoulos
14:00 - 15:00
Room: Q2
15:00 Coffee break
Coffee break
15:00 - 15:15
15:15 High-Performance Computer Architecture - Dimitrios Nikolopoulos
High-Performance Computer Architecture
- Dimitrios Nikolopoulos
15:15 - 17:00
Room: Q2
Tuesday 14 August 2018
09:15 Concepts and Algorithms for Scientific Computing - Michael Hanke
Concepts and Algorithms for Scientific Computing
- Michael Hanke
09:15 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Concepts and Algorithms for Scientific Computing - Michael Hanke
Concepts and Algorithms for Scientific Computing
- Michael Hanke
10:15 - 12:00
Room: Q2
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00
13:00 Introduction to PDC's Environment - Xin Li
Introduction to PDC's Environment
- Xin Li
13:00 - 14:00
Room: Q2
14:00 Lab: Introduction to PDC's Environment
Lab: Introduction to PDC's Environment
14:00 - 15:00
Room: Grön, Brun Lab Rooms (4V5Grö)

PDC Machine Room Tour
PDC Machine Room Tour
14:00 - 15:00

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: Introduction to PDC's Environment
Lab: Introduction to PDC's Environment
15:15 - 17:00
Room: Grön, Brun Lab Rooms (4V5Grö)

PDC Machine Room Tour
PDC Machine Room Tour
15:15 - 17:00
Wednesday 15 August 2018
09:15 Shared memory programming, OpenMP - Christoph Kessler
Shared memory programming, OpenMP
- Christoph Kessler
09:15 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Shared memory programming, OpenMP - Christoph Kessler
Shared memory programming, OpenMP
- Christoph Kessler
10:15 - 12:00
Room: Q2
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00
13:15 Shared memory programming, OpenMP - Christoph Kessler
Shared memory programming, OpenMP
- Christoph Kessler
13:15 - 14:00
Room: Q2
14:15 Lab: Programming Exercises on OpenMP
Lab: Programming Exercises on OpenMP
14:15 - 15:00
Room: Grön, Brun Lab Rooms (4V5Grö)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: Programming Exercises on OpenMP
Lab: Programming Exercises on OpenMP
15:15 - 17:00
Room: Grön, Brun Lab Rooms (4V5Grö)
Thursday 16 August 2018
09:15 Shared memory programming, OpenMP - Christoph Kessler
Shared memory programming, OpenMP
- Christoph Kessler
09:15 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Shared memory programming, OpenMP - Christoph Kessler
Shared memory programming, OpenMP
- Christoph Kessler
10:15 - 12:00
Room: Q2
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00

13:15 Lab: OpenMP Advanced Project
Lab: OpenMP Advanced Project
13:15 - 15:00
Room: Grön, Brun Lab Rooms (4V5Grö)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: OpenMP Advanced Project
Lab: OpenMP Advanced Project
15:15 - 17:00
Room: Grön, Brun Lab Rooms (4V5Grö)
Friday 17 August 2018
09:15 Introduction to GPUs - Stefano Markidis
Introduction to GPUs
- Stefano Markidis
09:15 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Introduction to CUDA - Stefano Markidis
Introduction to CUDA
- Stefano Markidis
10:15 - 12:00
Room: Q2
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00

13:15 Lab: CUDA
Lab: CUDA
13:15 - 15:00
Room: Grön, Brun Lab Rooms (4V5Grö)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: CUDA
Lab: CUDA
15:15 - 17:00
Room: Grön, Brun Lab Rooms (4V5Grö)
Saturday 18 August 2018
Sunday 19 August 2018

Monday 20 August 2018
09:15 Introduction to CUDA - Stefano Markidis
Introduction to CUDA
- Stefano Markidis
09:15 - 10:00
Room: Q36
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Introduction to CUDA - Stefano Markidis
Introduction to CUDA
- Stefano Markidis
10:15 - 12:00
Room: Q36
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00
13:15 Distributed Memory Programming - Erwin Laure (PDC-HPC)
Distributed Memory Programming
- Erwin Laure (PDC-HPC)
13:15 - 14:00
Room: Q36
14:15 Lab: CUDA
Lab: CUDA
14:15 - 15:00
Room: Röd, Ora Lab Rooms (4V2Röd)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: CUDA
Lab: CUDA
15:15 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)
Tuesday 21 August 2018
09:15 MPI:Basic Concepts, Point-to-Point Communication - Erwin Laure (PDC-HPC)
MPI:Basic Concepts, Point-to-Point Communication
- Erwin Laure (PDC-HPC)
09:15 - 10:00
Room: Q34
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 MPI: Point-to-Point and Collective Communication - Erwin Laure (PDC-HPC)
MPI: Point-to-Point and Collective Communication
- Erwin Laure (PDC-HPC)
10:15 - 12:00
Room: Q34
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00

13:15 Lab: MPI Part 1
Lab: MPI Part 1
13:15 - 15:00
Room: Röd, Ora Lab Rooms (4V2Röd)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: MPI Part 1
Lab: MPI Part 1
15:15 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)

Project Work
Project Work
15:15 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)
Wednesday 22 August 2018
09:15 MPI - Intermediate MPI - Erwin Laure (PDC-HPC)
MPI - Intermediate MPI
- Erwin Laure (PDC-HPC)
09:15 - 10:00
Room: Q33
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 MPI - Intermediate MPI and Advanced Concepts - Erwin Laure (PDC-HPC)
MPI - Intermediate MPI and Advanced Concepts
- Erwin Laure (PDC-HPC)
10:15 - 12:00
Room: Q33
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00

13:15 Lab: MPI Part 2
Lab: MPI Part 2
13:15 - 15:00
Room: Röd, Ora Lab Rooms (4V2Röd)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: MPI Part 2
Lab: MPI Part 2
15:15 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)
Thursday 23 August 2018
09:15 Performance Engineering - Pekka Manninen
Performance Engineering
- Pekka Manninen
09:15 - 10:00
Room: Q33
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Performance Engineering - Pekka Manninen
Performance Engineering
- Pekka Manninen
10:15 - 12:00
Room: Q33
12:00 Individual Lunch
Individual Lunch
12:00 - 13:00

13:15 Lab: Performance Engineering
Lab: Performance Engineering
13:15 - 15:00
Room: Röd, Ora Lab Rooms (4V2Röd)

15:00 Coffee break
Coffee break
15:00 - 15:15

15:15 Lab: Performance Engineering
Lab: Performance Engineering
15:15 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)

18:00 PDC Summer School Dinner
PDC Summer School Dinner
18:00 - 21:00
Friday 24 August 2018
09:15 Introduction to Parallel I/O - Stefano Markidis
Introduction to Parallel I/O
- Stefano Markidis
09:15 - 10:00
Room: Q2
10:00 Coffee break
Coffee break
10:00 - 10:15
10:15 Introduction to MPI I/O - Stefano Markidis
Introduction to MPI I/O
- Stefano Markidis
10:15 - 11:00
Room: Q2
11:15 Synchoros VLSI Design for Neuromorphic Applications to achieve 3-4 orders more efficiency than GPUs/FPGAs - Ahmed Hemani
Synchoros VLSI Design for Neuromorphic Applications to achieve 3-4 orders more efficiency than GPUs/FPGAs (Modern Computer Architectures)
- Ahmed Hemani
11:15 - 12:00
Room: Q2 The rise of megatrend in Neural Networks has identified ASIC (custom hardware design) as a necessity to achieve orders of magnitude greater performance and efficiency compared to what is feasible with GPUs and FPGAs. At KTH, we have developed a VLSI Design method called Synchoros VLSI Design Style that enables achieving 3-4 orders better computational efficiency compared to GPUs and FPGAs. The most critical advantage of synchoros VLSI Design is not just its high performance and efficiency but the fact that it can be produced with engineering effort comparable to CUDA programming. Additionally, synchoros VLSI Design Style also promises to dramatically lower the manufacturing cost as well. This talk will introduce this design style and show how it has been applied to different types of Neural Networks.
12:00 Course Evaluation
Course Evaluation
12:00 - 12:10
Room: Q2

12:10 Individual Lunch
Individual Lunch
12:10 - 13:00

13:00 Open Lab and Project Work
Open Lab and Project Work
13:00 - 17:00
Room: Röd, Ora Lab Rooms (4V2Röd)

Choose timezone