Speaker
Description
Trapped-ion quantum computers mature to larger qubit numbers, but their computational capability is limited by architectural and control constraints. We present a framework for quantifying and optimizing the computational capabilities of trapped-ion processors. Using compiler techniques from classical computer science, we show how arbitrary quantum circuits can be mapped to hardware-efficient sequences of operations, optimized for metrics such as shuttling distance and gate overhead. The approach builds on and extends existing work on circuit compilation for trapped-ion quantum computers [1], and relates to analogous compiler frameworks developed for neutral atom systems [2]. It is demonstrated for both 1D and 2D [3] shuttling architectures, and extended toward logical qubit encodings to support fault-tolerant operations in future large-scale systems. In this context, we introduce a universal routing and scheduling algorithm for a shuttling-based trapped-ion quantum computer that efficiently orchestrates qubit register reconfiguration and gate execution, tailored to varying levels of ion-qubit connectivity.
References
[1] Kreppel, F., et al., Quantum circuit compiler for a shuttling-based trapped-ion quantum computer, Quantum 7, 1176 (2023).
[2] Schmid, L., Locher, D., Rispler, M., Blatt, S., Zeiher, J., Müller, M., Wille, R., Computational Capabilities and Compiler Development for Neutral Atom Quantum Processors - Connecting Tool Developers and Hardware Experts, Quantum Science and Technology (2024).
[3] Schoenberger et al., Shuttling for Trapped-Ion Quantum Computers with Embedded Processing Zones, Proc. IEEE QSW (2025).
This work is carried out in collaboration with the group of Prof. Robert Wille (Technical University of Munich) and neQxt GmbH.
| Academic level | PhD student |
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