Speaker
Mr
David Calvo
(IFIC)
Description
Time to Digital Converters (TDCs) are a very common devices in particle physics
experiments. In the case of KM3NeT, thirty-one 1-ns resolution TDCs are used
in order to discretize the photomultiplier output. The TDC has been embedded
on a Field-Programmable Gate Array (FPGA). An architecture with low resources
occupancy has been used allowing the implementation of other instrumentation,
communication and synchronization systems on the same device. The required
resolution to measure both the time of flight and the time stamp must be 1 ns.
A 4X Oversampling technique with two high frequency clocks has been used to
achieve this resolution. The proposed TDC firmware has been developed using
very few resources in Xilinx Kintex-7 FPGA. On the present article the TDC
system is presented in detail.
Primary author
Mr
David Calvo
(IFIC)
Co-author
Mr
Diego Real
(IFIC)
